Copackaged optics have officially found their killer app – of course it’s AI
Summary
AI’s hunger for scale and power efficiency is finally pushing co-packaged optics (CPO) from experimental to mainstream. At SC25 Nvidia announced deployment of its Quantum-X Photonics switches with operators such as Lambda and CoreWeave, while Broadcom is showing competing Tomahawk-based CPO platforms. The technology embeds photonic chiplets alongside switch ASICs so fibre connects directly to the switch front panel instead of using thousands of pluggable transceivers. That reduces power, improves latency, and simplifies cabling for massive GPU farms.
Key technical highlights: CPO enables very high port speeds (800Gbps today, roadmap toward 1.6Tbps), switch bandwidths in the 100+Tbps range, and major optics power savings (Nvidia claims up to 3.5x efficiency; Broadcom cites ~65% optics power reduction). Early reliability data from Broadcom/Meta and Nvidia suggests CPO is more resilient than expected, and vendors are mitigating laser failure risks with external laser modules and redundancy strategies.
Key Points
- AI-scale GPU clusters are the primary driver for rapid CPO adoption due to power and reach limits of pluggable optics.
- Nvidia unveiled Quantum-X Photonics switches (144×800Gbps InfiniBand, liquid-cooled; 115.2Tbps) and is deploying them with major GPU operators.
- Broadcom’s Davisson/Tomahawk CPO family and other vendors (Micas Networks) offer Ethernet and packet switching CPO options at similar multi-Tbps scale.
- CPO reduces the need for pluggable transceivers — cutting node optics counts dramatically in very large clusters and saving substantial watts per port.
- Reliability concerns (bigger blast radius on failure) have been addressed: external laser modules, redundancy, and early field data show strong flap-free operation at scale.
- Future developments aim to move optical I/O onto accelerators and chip packages (Ayar Labs, Lightmatter, Celestial AI), potentially eliminating pluggables entirely and enabling very high-bandwidth chip-to-chip links.
- Short-term: expect broad rollouts in 2026 across HPC and hyperscaler AI backends; medium-term: optical interposers and CPO on accelerators could change compute architecture.
Context and relevance
Data-centre power ceilings and the exponential growth of AI model compute are forcing infrastructure changes. CPO addresses both by cutting optics power and extending reach at very high data rates, which matters to anyone building or operating large GPU clusters, HPC facilities, or hyperscale networks. The move also affects procurement, cabling standards and operational practices — and it creates a new design axis for NICs, switches and accelerator packaging.
For networking and HPC teams this is a pivotal shift: vendors (Nvidia, Broadcom, Micas) are shipping high-bandwidth CPO switches and major operators (Meta, TACC, Lambda, CoreWeave) are validating the approach. If you care about energy efficiency, latency or scaling training fleets, CPO changes the cost and floorplan of modern AI infrastructure.
Author note (punchy)
Big vendors and hyperscalers are no longer treating CPO as lab tech — they’re installing it. That makes this story not just interesting but operationally urgent if you’re planning AI clusters at scale.
Why should I read this?
Short version: GPUs chew power and cables like candy. CPO is the tech that stops your datacentre bill and cabling nightmare from getting worse. If you run or design AI/HPC infrastructure, this is the one development that will reshape switch and optics decisions next year — so yes, skim the details unless you enjoy being surprised by your next power invoice.
Source
Source: https://go.theregister.com/feed/www.theregister.com/2025/11/22/cpo_ai_nvidia_broadcom/